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GTRxGUI
Commit 49040869 authored by sam's avatar sam
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新增 N9H20 GTRx 專案樣板

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N9H20_HMI_NonOS_BSP_V1.04.000t/BSP/Project/N9H20_GTRx/N9H20_GTRx.uvopt 0 → 100644
View file @ 49040869
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj; *.o</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>N9H20K5_NAND_480x272</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>24000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>1</RunSim>
<RunTarget>0</RunTarget>
<RunAbUc>0</RunAbUc>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\Listings\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>255</CpuCode>
<Books>
<Book>
<Number>0</Number>
<Title>User Manual</Title>
<Path>DATASHTS\Toshiba\TMPA900CMXBG_UM.pdf</Path>
</Book>
</Books>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<nTsel>18</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile>..\..\Script\N9H20K5\N9H20K5.ini</tIfile>
<pMon>Segger\JLTAgdi.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>JLTAgdi</Key>
<Name>-O1070 -J1 -Y1000 -Z1 -FO7 -FDF8002000 -FC800 -FN0</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>1</periodic>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>0</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<bAutoGenD>0</bAutoGenD>
<LntExFlags>0</LntExFlags>
<pMisraName></pMisraName>
<pszMrule></pszMrule>
<pSingCmds></pSingCmds>
<pMultCmds></pMultCmds>
<pMisraNamep></pMisraNamep>
<pszMrulep></pszMrulep>
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
</TargetOption>
</Target>
<Group>
<GroupName>Src</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\User\Src\wb_init.s</PathWithFileName>
<FilenameWithoutPath>wb_init.s</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
</ProjectOpt>
N9H20_HMI_NonOS_BSP_V1.04.000t/BSP/Project/N9H20_GTRx/User/Src/wb_init.s 0 → 100644
View file @ 49040869
;/**************************************************************************//**
; * @file wb_init.s
; * @brief N9H20 series startup code
; *
; * SPDX-License-Identifier: Apache-2.0
; * @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
; *****************************************************************************/
AREA WB_INIT, CODE, READONLY
;--------------------------------------------
; Mode bits and interrupt flag (I&F) defines
;--------------------------------------------
USR_MODE EQU 0x10
FIQ_MODE EQU 0x11
IRQ_MODE EQU 0x12
SVC_MODE EQU 0x13
ABT_MODE EQU 0x17
UDF_MODE EQU 0x1B
SYS_MODE EQU 0x1F
I_BIT EQU 0x80
F_BIT EQU 0x40
;----------------------------
; System / User Stack Memory
;----------------------------
IF :DEF:N9H20K1
RAM_Limit EQU 0x200000 ; For unexpanded hardware board
ENDIF
IF :DEF:N9H20K3
RAM_Limit EQU 0x800000 ; For unexpanded hardware board
ENDIF
IF :DEF:N9H20K5
RAM_Limit EQU 0x2000000 ; For unexpanded hardware board
ENDIF
UND_Stack EQU RAM_Limit
Abort_Stack EQU RAM_Limit-256
IRQ_Stack EQU RAM_Limit-512 ; followed by IRQ stack
FIQ_Stack EQU RAM_Limit-768 ; followed by IRQ stack
SVC_Stack EQU RAM_Limit-1024 ; SVC stack at top of memory
USR_Stack EQU RAM_Limit
ENTRY
EXPORT Reset_Go
EXPORT Vector_Table
Vector_Table
B Reset_Go ; Modified to be relative jumb for external boot
LDR PC, Undefined_Addr
LDR PC, SWI_Addr
LDR PC, Prefetch_Addr
LDR PC, Abort_Addr
DCD 0x0
LDR PC, IRQ_Addr
LDR PC, FIQ_Addr
Reset_Addr DCD Reset_Go
Undefined_Addr DCD Undefined_Handler
SWI_Addr DCD SWI_Handler1
Prefetch_Addr DCD Prefetch_Handler
Abort_Addr DCD Abort_Handler
DCD 0
IRQ_Addr DCD IRQ_Handler
FIQ_Addr DCD FIQ_Handler
; ************************
; Exception Handlers
; ************************
; The following dummy handlers do not do anything useful in this example.
; They are set up here for completeness.
Undefined_Handler
B Undefined_Handler
SWI_Handler1
B SWI_Handler1
Prefetch_Handler
B Prefetch_Handler
Abort_Handler
B Abort_Handler
IRQ_Handler
B IRQ_Handler
FIQ_Handler
B FIQ_Handler
Reset_Go
;--------------------------------
; Initial Stack Pointer register
;--------------------------------
;INIT_STACK
MSR CPSR_c, #UDF_MODE :OR: I_BIT :OR: F_BIT
LDR SP, =UND_Stack
MSR CPSR_c, #ABT_MODE :OR: I_BIT :OR: F_BIT
LDR SP, =Abort_Stack
MSR CPSR_c, #IRQ_MODE :OR: I_BIT :OR: F_BIT
LDR SP, =IRQ_Stack
MSR CPSR_c, #FIQ_MODE :OR: I_BIT :OR: F_BIT
LDR SP, =FIQ_Stack
MSR CPSR_c, #SYS_MODE :OR: I_BIT :OR: F_BIT
LDR SP, =USR_Stack
MSR CPSR_c, #SVC_MODE :OR: I_BIT :OR: F_BIT
LDR SP, =SVC_Stack
;------------------------------------------------------
; Set the normal exception vector of CP15 control bit
;------------------------------------------------------
MRC p15, 0, r0 , c1, c0 ; r0 := cp15 register 1
BIC r0, r0, #0x2000 ; Clear bit13 in r1
MCR p15, 0, r0 , c1, c0 ; cp15 register 1 := r0
IF :DEF:SYS_INIT
;-----------------------------
; system initialization
;------------------------------
;LDR r0, =0xFFF00004
ldr r0, =0xFFF00004
ldr r1, =0x00000540
str r1, [r0]
ldr r0, =0xFFF0000C
ldr r1, =0x00004F47 ; 240MHz: 4F47, 192MHz: 3F47
str r1, [r0]
ldr r0, =0XFFF00010
ldr r1, =0x001FFFFF
str r1, [r0]
ldr r0, =0xFFF00014
ldr r1, =0x104514BB
str r1, [r0]
ldr r0, =0xFFF00020
ldr r1, =0x00000009
str r1, [r0]
ldr r0, =0xFFF00030
ldr r1, =0x00000000
str r1, [r0]
ldr r0, =0XFFF00034
ldr r1, =0x00000000
str r1, [r0]
ldr r0, =0xFFF00038
ldr r1, =0x000001AB
str r1, [r0]
ldr r0, =0xFFF0003C
ldr r1, =0x00000050 ;CPU:AHP:APB 1:2:4 0x50, CPU:AHB:APB 1:1:2 0x41
str r1, [r0]
ldr r0, =0xFFF00040
ldr r1, =0x60000000
str r1, [r0]
ldr r0, =0xFFF01000
ldr r1, =0x00154201
str r1, [r0]
ldr r0, =0xFFF01004
ldr r1, =0x4006FFF6
str r1, [r0]
ldr r0, =0xFFF01010
ldr r1, =0x000090CD ;16M: 90CC, 32M: 90CD
str r1, [r0]
ldr r0, =0xFFF01018
ldr r1, =0x0000015B
str r1, [r0]
ldr r0, =0xFFF01020
ldr r1, =0x80007FFD
str r1, [r0]
ldr r0, =0xFFF01028
ldr r1, =0x00000027
str r1, [r0]
ldr r0, =0xFFF0001C
ldr r1, =0x00000080
str r1, [r0]
ENDIF
IMPORT __main
;-----------------------------
; enter the C code
;-----------------------------
B __main
END
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